1. Field of the Invention
The present invention generally relates to memory devices for storing image data, and more particularly to a memory device having a large storage capacity in which plenty of image data are written therein and read out therefrom with a high speed so as to display the image corresponding to the image data on a screen of a display unit.
2. Prior Art
Generally, a memory device for storing image data (such as a frame buffer and the like) is used for displaying the image on the screen of display unit. In order to perform a multicolor display and a high resolution display, such memory device is required to perform write-in and read-out processes with a high speed and to provide a large storage capacity. The storage capacity of the frame buffer must be increased in proportion to the size of display area and the resolution value of the display unit and in accordance with the number of display screens (in the case where the display unit is provided with a plurality of display screens) and the number of displayed colors as well.
For instance, in the case where sixteen colors are to be displayed on the screen of the display unit (on the display screen), a color code designating one of the sixteen colors must be in the form of four-bit digital data. Hence, as shown in FIG. 1, the frame memory must be constituted by four frame memories FM0 to FM3. In FIG. 1, one dot of the display screen corresponds to four data surrounded by a dotted line which exist at the same bit position of the frame memories FM0 to FM3. A direction of the dotted line is called a pixel (picture element) direction. When the image is displayed on the display screen, the plural data in the pixel direction (hereinafter, four data in the pixel direction will be referred to as one pixel data) are sequentially read out from the frame memories FM0 to FM3 in accordance with the scanning of the display screen, whereby the multicolor display can be performed.
Actually, the frame memories FM0 to FM3 are constituted by dual port memories in order to obtain a high picture quality of the display screen. Generally, the four data within one pixel data are synchronized and read out from serial data output terminals of the frame memories FM0 to FM3, hence, plural pixel data are read out from the frame memories FM0 to FM3. In FIG. 1, when the access is performed by one word, the access direction will be called a word direction as shown by an arrow surrounded by a dashed line.
However, the conventional memory device is disadvantageous in that the following problems must necessarily occur.
Firstly, in the above-mentioned memory device having plural memory units (or memory boards), it is required to transfer the data by words or by pixels. In this case, one of the memory units and the address of the data as the source must be selected one by one so as to read out the data therefrom, and one of the memory units and the address of the data as the destination must be selected so as to write the data therein. Hence, the conventional memory device suffers a problem in that the access must be performed at many times in the data transfer, hence, much time must be required for the data transfer.
Secondly, in the case where the destination area or the source area exists in consecutive two words area, the access must be performed at further more times and the process for changing the bit position of the transfer data must be required. Hence, the conventional memory device suffers another problem in that the transfer time must be increased and the read-out and write-in processes must be complicated.
Thirdly, the conventional memory device is advantageous in that the color codes can be read out well when the image is displayed. However, the processes for exchanging data are extremely complicated when the independent access is performed to each pixel data and the predetermined two bits are exchanged in a certain pixel, for example. More specifically, the word data of eight bits (as shown by dashed line in FIG. 1) are read out in one chip within the frame memories FM0 to FM3. For this reason, when the access is given to the subject data (of more than two bits) by pixels and by bits as described above, the read-out process must be performed on word data including the subject data and the subject data must be extracted from the above word data. Hence, the conventional memory device suffers a further problem in that the processes for exchanging data must be complicated and much process time thereof must be required.
Fourthly, the memory device for storing the image data must require the large storage capacity. In this case, memory usage efficiency and packaging space can be improved by using a portion of the storage area as a program area. However, the image memory using the conventional memory device and the peripheral circuits thereof is disadvantageous in that it is impossible to use a portion of the storage area as the program area with ease because the access process must be complicated.
Fifthly, a picture processing technique requires processes for searching and detecting specific colors on the display screen. For example, in order to detect the coordinates of boundary portions of the predetermined image, the color codes must be searched at the boundary portions and the coordinates corresponding to the searched color codes must be calculated.
However, the conventional memory device is not provided with a function for comparing the data stored therein. In order to perform the above-mentioned search process, the central processing unit (CPU) connected to the memory device must perform the entire search process which requires the complicated control, and it is burdensome for the CPU. As a result, the conventional memory device suffers a problem in that it is difficult to perform the image process with a high speed. More specifically, the data must be read out by every plane in all of the frame buffers, and the read-out data are converted into the pixel data. Then the search/detect processes must be performed on the pixel data. Hence, the read-out process and the converting process must be complicated.
Sixthly, the picture processing sometimes requires the memory device to provide special functions for performing several kinds of processes. In a system where plural memory portions are provided therein, it is necessary to provide all of such special functions in common with all of the memory portions, and it is also necessary to independently supply parameters concerning such special functions to each memory portion. However, the conventional memory device is disadvantageous in that the above-mentioned constitution can not be realized.
Seventhly, the picture processing requires a process for detecting whether the inputted color code coincides with the predetermined color code or not or a process for performing a logical operation between the inputted color code and the predetermined color code when the color code is written into the memory device. This logical operation is used for image composition, display blanking and partial image movement and the like. For example, in the case where destination data, pattern data and source data are respectively set as a background image, a pattern image and pattern color data, the logical operations are performed on the above data so that the pattern image is displayed on the background and the color of the pattern image is displaced by the color indicated by the source data.
In the above-mentioned processes, it is necessary to displace the pattern data, the source data and the destination data or comparing/detecting data when the picture processing is performed. Conventionally, the CPU and a graphic controller for controlling the memory device performs the above-mentioned processes, hence, it is extremely difficult to displace the data with a high speed. In addition, in the case where control programs for the CPU are complicated and there are many color codes to be operated, many kinds of logical operations are required. Hence, the conventional device suffers a problem in that it is burdensome to select and perform the logical operations.
Lastly, in the case where plural frame memories are connected in parallel as the frame buffers, the same data bus must be connected to output terminals of the same bit number within the frame memories. Hence, the total floating capacity of the data buses can not be prevented from enlarging. Meanwhile, in the case where data output buffers of the frame memories are identified as the open type (i.e., an open drain type and an open collector type and the like), a time lag in which the level of the data bus is changed from "0" level to "1" level will be determined by a time constant corresponding to the total floating capacity and resistances of pull-up resistors of the data buses. Generally the resistances of the pull-up resistors are set to relatively large resistances in order to reduce demanding electric power. Due to the large total floating capacity and the large resistances of the pull-up resistors of the data buses, the time constant becomes extremely large. Hence, the conventional frame buffers are disadvantageous in that the time lag becomes extremely long when signal having "1" logical level (hereinafter, referred to as "1" signal) is outputted from the data bus. In contrast with the above case, when the "0" or "1" signal is charged in the negative side of the data, bus, the state inverse to the above-mentioned state will occur, however, the conventional frame buffers are disadvantageous as described above.